18 publication(s) :

Articles

1 - 
Software HEVC video decoder: towards an energy saving for mobile applications
N. Sidaty, J. Heulot, W. Hamidouche, M. Pelcat, D. Menard
Multimedia Tools and Applications, Springer Verlag, 2020,
DOI : https://doi.org/10.1007/s11042-020-09025-y
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2 - 
DAMHSE Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping
L. Suriano, F. Arrestier, A. Rodríguez, J. Heulot, K. Desnos, M. Pelcat, E. Torre
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2019, 71, pp.102882.
DOI : https://doi.org/10.1016/j.micpro.2019.102882
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3 - 
Reproducible Evaluation of System Efficiency with a Model of Architecture: From Theory to Practice
M. Pelcat, A. Mercat, K. Desnos, L. Maggiani, Y. Liu, J. Heulot, J.-F. Nezan, W. Hamidouche, D. Menard, S. Bhattacharyya
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2018, 37 (10), pp.2050 - 2063.
DOI : https://doi.org/10.1109/TCAD.2017.2774822
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4 - 
Efficient DVFS for low power HEVC software decoder
E. Nogues, J. Heulot, G. Herrou, L. Robin, M. Pelcat, D. Menard, E. Raffin, W. Hamidouche
Journal of Real-Time Image Processing, Springer Verlag, 2017, 13 (1), pp.39-54.
DOI : https://doi.org/10.1007/s11554-016-0624-9
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5 - 
Challenging the Best HEVC Fractional Pixel FPGA Interpolators With Reconfigurable and Multifrequency Approximate Computing
C. Sau, F. Palumbo, M. Pelcat, J. Heulot, E. Nogues, D. Menard, P. Meloni, L. Raffo
IEEE Embedded Systems Letters, Institute of Electrical and Electronics Engineers, 2017, 9 (3), pp.65 - 68.
DOI : https://doi.org/10.1109/LES.2017.2703585
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Communications

6 - 
Delays and States in Dataflow Models of Computation
F. Arrestier, K. Desnos, M. Pelcat, J. Heulot, E. Juarez, D. Menard
SAMOS XVIII, Jul 2018, Pythagorion, Greece.
DOI : https://doi.org/10.1145/3229631.3229645
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7 - 
Reducing Computational Complexity in HEVC Decoder for Mobile Energy Saving
N. Sidaty, J. Heulot, W. Hamidouche, M. Pelcat, D. Menard
European Signal Processing Conference (EUSIPCO 2017), Aug 2017, Nos Island, Greece.
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8 - 
Models of Architecture: Reproducible Efficiency Evaluation for Signal Processing Systems
M. Pelcat, K. Desnos, L. Maggiani, Y. Liu, J. Heulot, J. F. Nezan, S. Bhattacharyya
International Workshop on Signal Processing Systems, Oct 2016, Dallas, United States.
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9 - 
PiSDF: Parameterized & Interfaced Synchronous Dataflow for MPSoCs Runtime Reconfiguration
K. Desnos, J. Heulot
1st Workshop on MEthods and TOols for Dataflow PrOgramming (METODO), ECSI, Oct 2014, Madrid, Spain.
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10 - 
Demonstrating a Dataflow-based RTOS for Heterogeneous MPSoC by means of a Stereo Matching Application
J. Heulot, J. Menant, M. Pelcat, J.-F. Nezan, L. Morin, M. Pressigout, S. Aridhi
DASIP 2014, Oct 2014, Madrid, Spain.
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