@inproceedings{yasin:hal-04038793,
TITLE = {Formal Verification of Divider Circuits by Hardware Reduction},
AUTHOR = {Yasin, Atif and Su, Tiankai and Pillement, S{\'e}bastien and Ciesielski, Maciej},
URL = {https://hal.science/hal-04038793},
BOOK
TITLE = {International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD 2023)},
ADDRESS = {Funchal - Madeira Island, Portugal},
PAGES = {paper id 5112},
YEAR = {2023},
MONTH = Jul, HAL_ID = {hal-04038793},
HAL_VERSION = {v1},
}