@inproceedings{pelcat:hal-01358210,
TITLE = {Design Productivity of a High Level Synthesis Compiler versus HDL},
AUTHOR = {Pelcat, Maxime and Bourrasset, C{\'e}dric and Maggiani, Luca and Berry, Fran{\c c}ois},
URL = {https://hal.science/hal-01358210},
BOOK
TITLE = {2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2016)},
ADDRESS = {Agios Konstantinos, SAMOS, Greece},
YEAR = {2016},
MONTH = Jul, DOI = {10.1109/SAMOS.2016.7818341},
KEYWORDS = {High Level Synthesis ; Design Productivity ; FPGA},
PDF = {https://hal.science/hal-01358210/file/samos_hls-design-productivity_hal.pdf},
HAL_ID = {hal-01358210},
HAL_VERSION = {v1},
}