@article{zhang:hal-00906019,
TITLE = {P-type and N-type multi-gate polycrystalline silicon vertical thin film transistors based on low-temperature technology},
AUTHOR = {Zhang, Peng and Jacques, Emmanuel and Rogel, Regis and Bonnaud, Olivier},
URL = {https://hal.science/hal-00906019},
JOURNAL = {Solid-State Electronics},
PUBLISHER = {Elsevier},
VOLUME = {86},
PAGES = {1-5},
YEAR = {2013},
DOI = {10.1016/j.sse.2013.04.021},
KEYWORDS = {Polycrystalline silicon ; 3D structure ; Plasma etching ; Thin film transistor (TFT)},
PDF = {https://hal.science/hal-00906019/file/P-type-N-type-SSE2013-revised-clear-manuscript.pdf},
HAL_ID = {hal-00906019},
HAL_VERSION = {v1},
}